1. Field of the Invention
The present invention relates to a method for depositing a dielectric layer. More particularly, the present invention relates to a method for depositing a dielectric layer using a barrier layer, which prevents the oxidization and diffusion of the constituents of a lower electrode.
2. Description of the Related Art
A dielectric layer having a high dielectric constant is used as a buffer layer for forming a large gallium-arsenide (GaAs) substrate, a capacitor, and a gate insulating layer in a conventional memory device. In particular, the dielectric layer is mainly used in a capacitor in memory, such as a dynamic random access memory (DRAM). As memory has become highly integrated, a capacitor having high capacitance is required to form semiconductor devices within a limited area.
A capacitor is formed of conductors facing each other and of a dielectric layer disposed therebetween to attain capacitance of a predetermined level. The capacitance of a capacitor is directly proportional to the effective area and the dielectric constant of the dielectric layer. The capacitance of a capacitor is inversely proportional to the thickness of the dielectric layer. Thus, when a capacitor is formed using a material having a high dielectric constant, the thickness of the capacitor is reduced, and an effective area is increased, capacitance of that capacitor increases. In order to increase the effective area of a capacitor in a memory device, such as a DRAM, the effective area of a dielectric layer deposited on a lower electrode is increased by forming the lower electrode vertically, i.e., having a reduced width and an increased height.
FIG. 1 is a transmission electron microscope (TEM) photograph illustrating a multi-layer structure formed by depositing a strontium titanate (STO; SrTiO3) dielectric layer on a silicon (Si) substrate. In the case of depositing the STO dielectric layer on the Si substrate as shown in FIG. 1, the Si substrate is likely to be oxidized by oxygen introduced in an oxide layer deposition process so that a silicon dioxide (SiO2) dielectric layer is formed on the Si substrate. In addition, amorphous SiO2 causes disorder in a lattice arrangement of an initial STO dielectric layer. Furthermore, a portion of the Si substrate is diffused to the STO dielectric layer in a subsequent thermal process so that the crystalline STO dielectric layer is broken. Referring to FIG. 1, a capacitor, in which the SiO2 dielectric layer and the STO dielectric layer are sequentially arranged on the Si substrate, is formed in a structure where a capacitor formed of the STO dielectric layer and the capacitor formed of the SiO2 dielectric layer are sequentially connected. Therefore, the capacitance of the capacitor is reduced and electric characteristics of the capacitor deteriorate.
In order to solve the above-problems, a method for depositing a dielectric layer after the formation of a metal electrode, such as ruthenium (Ru) or titanium nitride (TiN), on an Si substrate has been developed. FIG. 2 is a graph illustrating the relationship between the ratio of oxygen to the content of metal (O2/(Ti+Al+Ru+N)) and the activities of each metal in the case where an STO dielectric layer is deposited after TiN and Ru metal electrodes are deposited on an Si substrate.
Referring to FIG. 2, the activity of Ru is high in an oxidation atmosphere for depositing a dielectric layer so that Ru is likely to be transformed into ruthenium oxide (RuO2), thus, a thermal process of high temperature cannot be performed on Ru. In addition, TiN located between Si and Ru is transformed into titanium oxide (TiO2) according to the following chemical formula 1 and the activity of TiN steadily drops. Thus, TiN is likely to be broken, and therefore, it is difficult to produce a vertical capacitor having a thickness of less than 70 nm using TiN.2TiN+2O2→2TiO2+N2  [chemical formula 1]
In addition, a capacitor formed in a memory device, such as a DRAM, stores a small number of charges so that information loss occurs due to even a weak leakage current. Therefore, a method for depositing a dielectric layer and preventing leakage current are required.